Digital Class-S Radio Frequency Power Amplifier (RF-PAs) employ a spectrally shaped bitstream to switch the output stages in binary fashion. In operation, a bitstream generator, such as a sigma-delta modulator or Viterbi-based optimal-bit-pattern modulator, encodes an input baseband signal into a digital pulse stream in which the information-bearing baseband signal is frequency-translated to a desired carrier frequency. Simultaneously, the encoding process shapes quantization noise, assuring that it is greatly attenuated in the vicinity of the carrier frequency and pushed out-of-band, where quantization noise can be removed by bandpass filtering.
The bitstream drives the gates of a push-pull switch-mode final stage, through a level shift gate driver. The output of the final stage passes through a bandpass filter (BPF) to recover the modulated RF signal and to eliminate the out-band quantization noise.
Gate driving of the Class-S RF-PA is not amenable to conventional medium/narrow bandwidth RF matching techniques, as efficient final stage switching requires fast gate voltage rise times on the order of less than 50% of the bitstream generator's clock period and hence essentially a pulse drive capable of driving the input (gate) capacitance of the Class S amplifier's output stage.
One approach to gate-driving employs a current-steering long-tailed pair having low-valued collector/drain loads coupled directly to the gates of the driven transistors, but suffers problem of high power dissipation. Yet another approach to gate driving employs complementary class-AB type emitter followers in a totem-pole arrangement. This architecture is subject to the well-known instabilities exhibited by emitter followers when driving capacitive loads. Alternatively, high-speed CMOS output buffers may be employed, but are subject to breakdown limitations characteristic of thin-oxide narrow-gate length transistors.
There is, therefore, a continuing need for improved electronic circuits for driving the electrodes of Class-S RF-PAs. More particularly, there is a need for gate driving circuits with sufficiently fast rise times for driving the significantly capacitive load of the gates of the input transistors of the RF-PA with improved power consumption and stability characteristics.